//#define ___ROAST_SIMD__NEMONI_
//#define ___ROAST_SIMD__VAL_TYPE_
//#define ___ROAST_SIMD__VAL_NAME_



#define _ROAST_SIMD_CORE__XMM_M128__TEMPORARY_REGISTER		edx

#define _ROAST_SIMD_CORE__XMM_M128_GEN1(_X)		\
	break; case _X: __asm ___ROAST_SIMD__NEMONI_ xmm ## _X, ___ROAST_SIMD__VAL_NAME_;


/*	Function	*/
inline ROAST_SIMD_STATIC void ___ROAST_SIMD__NEMONI_(int xmm_num, ___ROAST_SIMD__VAL_TYPE_ ___ROAST_SIMD__VAL_NAME_)
{
#ifdef ___ROAST_SIMD__VAL_IS_POINTER
	__asm mov _ROAST_SIMD_CORE__XMM_M128__TEMPORARY_REGISTER, [___ROAST_SIMD__VAL_NAME_]
	
	#undef ___ROAST_SIMD__VAL_NAME_
	#define ___ROAST_SIMD__VAL_NAME_		[_ROAST_SIMD_CORE__XMM_M128__TEMPORARY_REGISTER]
#endif

	switch(xmm_num)
	{
	case -99:

	_ROAST_SIMD_CORE__XMM_M128_GEN1(0)
	_ROAST_SIMD_CORE__XMM_M128_GEN1(1)
	_ROAST_SIMD_CORE__XMM_M128_GEN1(2)
	_ROAST_SIMD_CORE__XMM_M128_GEN1(3)
	_ROAST_SIMD_CORE__XMM_M128_GEN1(4)
	_ROAST_SIMD_CORE__XMM_M128_GEN1(5)
	_ROAST_SIMD_CORE__XMM_M128_GEN1(6)
	_ROAST_SIMD_CORE__XMM_M128_GEN1(7)
#ifdef _M_AMD64
	_ROAST_SIMD_CORE__XMM_M128_GEN1(8)
	_ROAST_SIMD_CORE__XMM_M128_GEN1(9)
	_ROAST_SIMD_CORE__XMM_M128_GEN1(10)
	_ROAST_SIMD_CORE__XMM_M128_GEN1(11)
	_ROAST_SIMD_CORE__XMM_M128_GEN1(12)
	_ROAST_SIMD_CORE__XMM_M128_GEN1(13)
	_ROAST_SIMD_CORE__XMM_M128_GEN1(14)
	_ROAST_SIMD_CORE__XMM_M128_GEN1(15)
#endif
	}
}

#undef ___ROAST_SIMD__NEMONI_
#undef ___ROAST_SIMD__VAL_TYPE_
#undef ___ROAST_SIMD__VAL_NAME_
#ifdef ___ROAST_SIMD__VAL_IS_POINTER
	#undef ___ROAST_SIMD__VAL_IS_POINTER
#endif

#undef _ROAST_SIMD_CORE__XMM_M128__TEMPORARY_REGISTER
#undef _ROAST_SIMD_CORE__XMM_M128_GEN1
