<?xml version="1.0" encoding="euc-jp"?>
<mics>
  <element id="mem0" class="net.wasamon.mics.memory.RandomAccessMemory" size="0x1000"/>
  <element id="mem1" class="net.wasamon.mics.memory.RandomAccessMemory" size="0x01000000" image="./lenna.bmp">
    <init file="./lenna.bmp" offset="0"/>
    <init file="./GS2.cnf" offset="200000"/>
  </element>
  <element id="bus0" class="net.wasamon.mics.bus.MultiDataBus" ram="mem0"/>
  <element id="bus1" class="net.wasamon.mics.bus.MultiDataBus" ram="mem1"/>
  <element id="bmp0" class="net.wasamon.mics.memory.RandomAccessMemory" size="0x01000000"/>
  <element id="bus2" class="net.wasamon.mics.bus.MultiDataBus" ram="bmp0"/>
  <element id="bus3" class="net.wasamon.mics.bus.MultiDataBus" ram="mem0"/>
  <element id="bus4" class="net.wasamon.mics.bus.MultiDataBus" ram="mem0"/>
  <element id="bus5" class="net.wasamon.mics.bus.MultiDataBus" ram="bmp0"/>
  <element id="bus6" class="net.wasamon.mics.bus.MultiDataBus" ram="proc1"/>
  <element id="dma0" class="net.wasamon.mics.peripheral.DirectMemoryAccessController"
           width="3"
           src="bus2"
           dest="bus3"/>
  <element id="dma1" class="net.wasamon.mics.peripheral.DirectMemoryAccessController"
           width="3"
           src="bus4"
           dest="bus5"/>
  <element id="dma2" class="net.wasamon.mics.peripheral.DirectMemoryAccessController"
           width="3"
           src="bus1"
           dest="bus2"/>
  <element id="proc0" class="net.wasamon.mics.processor.SimpleProcessor32" memory="0x00007000">
    <channel id="bus0" offset="0x07000000"/>
    <channel id="bus1" offset="0x08000000"/>
    <channel id="dma0" offset="0x0a000000"/>
    <channel id="dma1" offset="0x0b000000"/>
    <channel id="dma2" offset="0x0d000000"/>
    <channel id="bus6" offset="0x0c000000"/>
    <init file="./toGrayScale.out" offset="0"/>
  </element>
  <element id="proc1" class="net.wasamon.mics.processor.monorlu.ReconfigurableUnit" size="8">
    <channel id="bus0" offset="0"/>
    <init file="./GS1.cnf" offset="0"/>
  </element>
</mics>
