| Package | Description |
|---|---|
| com.sun.electric.tool.io.input.verilog |
| Class and Description |
|---|
| VerilogData
User: gg151869
Date: Jan 19, 2007
|
| VerilogData.VerilogInstance |
| VerilogData.VerilogModule
Class to represent subcells
|
| VerilogData.VerilogPort
This class covers input/output/inout
|
| VerilogData.VerilogWire
This class covers wires.
|
| VerilogReader.VerilogPreferences |