| Class and Description |
|---|
| TechType
The TechType class holds technology dependent information for the layout
generators.
|
| TechType.TechTypeEnum
These are the Electric technologies understood by the gate layout
generators
|
| Class and Description |
|---|
| TechType
The TechType class holds technology dependent information for the layout
generators.
|
| Class and Description |
|---|
| TechType
The TechType class holds technology dependent information for the layout
generators.
|
| Class and Description |
|---|
| DrcRings.Filter |
| FoldedMos
first cut at a folded transistor generator.
|
| FoldedMos.GateSpace
Users use GateSpace objects to tell the FoldedMos constructors to leave
additional space between diffusion contacts and gates and between
adjacent gates.
|
| FoldsAndWidth
This class is used to return the result from StdCellParms.calcFoldsAndWidth.
|
| GateLayGenSettings
Constains project preferences for the gate layout generator
|
| LayoutLib.Corner |
| NodaNets.NodaPortInst
A 1-bit "port-like" object for Nodables
|
| PortFilter
A PortFilter is useful for removing certain PortInsts from the
list of PortInsts on a Network.
|
| ProjSettings.Tool1 |
| ProjSettings.Tool2 |
| StdCellParams
The bottom of the PMOS well and the top of the NMOS well are at
y=0.
|
| StdCellParams.SelectFill |
| StdCellParams.SelectSrcDrn
This class allows the user to specify which source/drains
wireVddGnd() should connect to power or ground.
|
| TechType
The TechType class holds technology dependent information for the layout
generators.
|
| TechType.MosInst
Hide the differences between technologies.
|
| TechType.TechTypeEnum
These are the Electric technologies understood by the gate layout
generators
|
| TrackRouter |
| Class and Description |
|---|
| TechType
The TechType class holds technology dependent information for the layout
generators.
|
| TechType.TechTypeEnum
These are the Electric technologies understood by the gate layout
generators
|
| Class and Description |
|---|
| StdCellParams
The bottom of the PMOS well and the top of the NMOS well are at
y=0.
|
| Class and Description |
|---|
| StdCellParams
The bottom of the PMOS well and the top of the NMOS well are at
y=0.
|