usrp_basic_rx Class Reference

class for accessing the receive side of the USRP More...

#include <usrp_basic.h>

Inheritance diagram for usrp_basic_rx:

Collaboration diagram for usrp_basic_rx:

List of all members.

Public Member Functions

~usrp_basic_rx ()

bool set_fpga_rx_sample_rate_divisor (unsigned int div)

tell the fpga the rate rx samples are coming from the A/D's

int read (void *buf, int len, bool *overrun)

read data from the D/A's via the FPGA. len must be a multiple of 512 bytes.

virtual long converter_rate () const

sampling rate of A/D converter

long adc_rate () const

long adc_freq () const

deprecated method name

int daughterboard_id (int which_dboard) const

Return daughterboard ID for given Rx daughterboard slot [0,1].

bool set_pga (int which, double gain_in_db)

Set Programmable Gain Amplifier (PGA).

double pga (int which) const

Return programmable gain amplifier gain setting in dB.

double pga_min () const

Return minimum legal PGA gain in dB.

double pga_max () const

Return maximum legal PGA gain in dB.

double pga_db_per_step () const

Return hardware step size of PGA (linear in dB).

bool _write_oe (int which_dboard, int value, int mask)

Write direction register (output enables) for pins that go to daughterboard.

bool write_io (int which_dboard, int value, int mask)

Write daughterboard i/o pin value.

bool read_io (int which_dboard, int *value)

Read daughterboard i/o pin value.

int read_io (int which_dboard)

Read daughterboard i/o pin value.

bool write_aux_dac (int which_board, int which_dac, int value)

Write auxiliary digital to analog converter.

bool read_aux_adc (int which_dboard, int which_adc, int *value)

Read auxiliary analog to digital converter.

int read_aux_adc (int which_dboard, int which_adc)

Read auxiliary analog to digital converter.

int block_size () const

returns current fusb block size

bool set_dc_offset_cl_enable (int bits, int mask)

Enable/disable automatic DC offset removal control loop in FPGA.

bool start ()

Start data transfers. Called in base class to derived class order.

bool stop ()

Stop data transfers. Called in base class to derived class order.

Static Public Member Functions

static usrp_basic_rx * make (int which_board, int fusb_block_size=0, int fusb_nblocks=0, const std::string fpga_filename="", const std::string firmware_filename="")

invokes constructor, returns instance or 0 if trouble

Protected Member Functions

usrp_basic_rx (int which_board, int fusb_block_size=0, int fusb_nblocks=0, const std::string fpga_filename="", const std::string firmware_filename="")

bool set_rx_enable (bool on)

bool rx_enable () const

bool disable_rx ()

void restore_rx (bool on)

void probe_rx_slots (bool verbose)

int dboard_to_slot (int dboard)

Protected Attributes

int d_dbid [2]

Detailed Description

class for accessing the receive side of the USRP

Constructor & Destructor Documentation

usrp_basic_rx::usrp_basic_rx	(	int	which_board,
		int	fusb_block_size = `0`,
		int	fusb_nblocks = `0`,
		const std::string	fpga_filename = `""`,
		const std::string	firmware_filename = `""`
	)			`[protected]`

Parameters:

	which_board	Which USRP board on usb (not particularly useful; use 0)
	fusb_block_size	fast usb xfer block size. Must be a multiple of 512. Use zero for a reasonable default.
	fusb_nblocks	number of fast usb URBs to allocate. Use zero for a reasonable default.

usrp_basic_rx::~usrp_basic_rx ( )

Member Function Documentation

bool usrp_basic_rx::_write_oe	(	int	which_dboard,
		int	value,
		int	mask
	)

Write direction register (output enables) for pins that go to daughterboard.

Parameters:

	which_dboard	[0,1] which d'board
	value	value to write into register
	mask	which bits of value to write into reg

Each d'board has 16-bits of general purpose i/o. Setting the bit makes it an output from the FPGA to the d'board.

This register is initialized based on a value stored in the d'board EEPROM. In general, you shouldn't be using this routine without a very good reason. Using this method incorrectly will kill your USRP motherboard and/or daughterboard.

long usrp_basic_rx::adc_freq ( ) const [inline]

deprecated method name

References converter_rate().

long usrp_basic_rx::adc_rate ( ) const [inline]

References converter_rate().

int usrp_basic_rx::block_size ( ) const

returns current fusb block size

virtual long usrp_basic_rx::converter_rate ( ) const [inline, virtual]

sampling rate of A/D converter

References usrp_basic::fpga_master_clock_freq().

Referenced by adc_freq(), and adc_rate().

int usrp_basic_rx::daughterboard_id ( int which_dboard ) const [inline]

Return daughterboard ID for given Rx daughterboard slot [0,1].

Parameters:

which_dboard

[0,1] which Rx daughterboard

Returns:

daughterboard id >= 0 if successful

-1 if no daugherboard

-2 if invalid EEPROM on daughterboard

References d_dbid.

int usrp_basic_rx::dboard_to_slot ( int dboard ) [inline, protected]

bool usrp_basic_rx::disable_rx ( ) [protected]

static usrp_basic_rx* usrp_basic_rx::make	(	int	which_board,
		int	fusb_block_size = `0`,
		int	fusb_nblocks = `0`,
		const std::string	fpga_filename = `""`,
		const std::string	firmware_filename = `""`
	)			`[static]`

invokes constructor, returns instance or 0 if trouble

Parameters:

	which_board	Which USRP board on usb (not particularly useful; use 0)
	fusb_block_size	fast usb xfer block size. Must be a multiple of 512. Use zero for a reasonable default.
	fusb_nblocks	number of fast usb URBs to allocate. Use zero for a reasonable default.

double usrp_basic_rx::pga ( int which ) const

Return programmable gain amplifier gain setting in dB.

Parameters:

which

which A/D [0,3]

double usrp_basic_rx::pga_db_per_step ( ) const [inline]

Return hardware step size of PGA (linear in dB).

double usrp_basic_rx::pga_max ( ) const [inline]

Return maximum legal PGA gain in dB.

double usrp_basic_rx::pga_min ( ) const [inline]

Return minimum legal PGA gain in dB.

void usrp_basic_rx::probe_rx_slots ( bool verbose ) [protected]

int usrp_basic_rx::read	(	void *	buf,
		int	len,
		bool *	overrun
	)

read data from the D/A's via the FPGA. len must be a multiple of 512 bytes.

Returns:: the number of bytes read, or -1 on error.

If overrun is non-NULL it will be set true iff an RX overrun is detected.

int usrp_basic_rx::read_aux_adc	(	int	which_dboard,
		int	which_adc
	)

Read auxiliary analog to digital converter.

Parameters:

	which_dboard	[0,1] which d'board
	which_adc	[0,1]

Returns:: value in the range [0,4095] if successful, else READ_FAILED.

Reimplemented from usrp_basic.

bool usrp_basic_rx::read_aux_adc	(	int	which_dboard,
		int	which_adc,
		int *	value
	)

Read auxiliary analog to digital converter.

Parameters:

	which_dboard	[0,1] which d'board
	which_adc	[0,1]
	value	return 12-bit value [0,4095]

Returns:: true iff successful

Reimplemented from usrp_basic.

int usrp_basic_rx::read_io ( int which_dboard )

Read daughterboard i/o pin value.

Parameters:

which_dboard

[0,1] which d'board

Returns:: register value if successful, else READ_FAILED

bool usrp_basic_rx::read_io	(	int	which_dboard,
		int *	value
	)

Read daughterboard i/o pin value.

Parameters:

	which_dboard	[0,1] which d'board
	value	output

void usrp_basic_rx::restore_rx ( bool on ) [protected]

bool usrp_basic_rx::rx_enable ( ) const [inline, protected]

bool usrp_basic_rx::set_dc_offset_cl_enable	(	int	bits,
		int	mask
	)

Enable/disable automatic DC offset removal control loop in FPGA.

Parameters:

	bits	which control loops to enable
	mask	which `bits` to pay attention to

If the corresponding bit is set, enable the automatic DC offset correction control loop.

 The 4 low bits are significant:

   ADC0 = (1 << 0)
   ADC1 = (1 << 1)
   ADC2 = (1 << 2)
   ADC3 = (1 << 3)

By default the control loop is enabled on all ADC's.

bool usrp_basic_rx::set_fpga_rx_sample_rate_divisor ( unsigned int div )

tell the fpga the rate rx samples are coming from the A/D's

div = fpga_master_clock_freq () / sample_rate

sample_rate is determined by a myriad of registers in the 9862. That's why you have to tell us, so we can tell the fpga.

bool usrp_basic_rx::set_pga	(	int	which,
		double	gain_in_db
	)

Set Programmable Gain Amplifier (PGA).

Parameters:

	which	which A/D [0,3]
	gain_in_db	gain value (linear in dB)

gain is rounded to closest setting supported by hardware.

Returns:: true iff sucessful.

See also:: pga_min(), pga_max(), pga_db_per_step()

bool usrp_basic_rx::set_rx_enable ( bool on ) [protected]

bool usrp_basic_rx::start ( )

Start data transfers. Called in base class to derived class order.

Reimplemented from usrp_basic.

Reimplemented in usrp_standard_rx.

bool usrp_basic_rx::stop ( )

Stop data transfers. Called in base class to derived class order.

Reimplemented from usrp_basic.

Reimplemented in usrp_standard_rx.

bool usrp_basic_rx::write_aux_dac	(	int	which_board,
		int	which_dac,
		int	value
	)

Write auxiliary digital to analog converter.

Parameters:

	which_dboard	[0,1] which d'board N.B., SLOT_TX_A and SLOT_RX_A share the same AUX DAC's. SLOT_TX_B and SLOT_RX_B share the same AUX DAC's.
	which_dac	[2,3] TX slots must use only 2 and 3.
	value	[0,4095]

Returns:: true iff successful

Reimplemented from usrp_basic.

bool usrp_basic_rx::write_io	(	int	which_dboard,
		int	value,
		int	mask
	)

Write daughterboard i/o pin value.

Parameters:

	which_dboard	[0,1] which d'board
	value	value to write into register
	mask	which bits of value to write into reg

Member Data Documentation

int usrp_basic_rx::d_dbid[2] [protected]

Referenced by daughterboard_id().

The documentation for this class was generated from the following file:

usrp_basic.h


Public Member Functions
	~usrp_basic_rx ()
bool	set_fpga_rx_sample_rate_divisor (unsigned int div)
	tell the fpga the rate rx samples are coming from the A/D's
int	read (void buf, int len, bool overrun)
	read data from the D/A's via the FPGA. `len` must be a multiple of 512 bytes.
virtual long	converter_rate () const
	sampling rate of A/D converter
long	adc_rate () const
long	adc_freq () const
	deprecated method name
int	daughterboard_id (int which_dboard) const
	Return daughterboard ID for given Rx daughterboard slot [0,1].
bool	set_pga (int which, double gain_in_db)
	Set Programmable Gain Amplifier (PGA).
double	pga (int which) const
	Return programmable gain amplifier gain setting in dB.
double	pga_min () const
	Return minimum legal PGA gain in dB.
double	pga_max () const
	Return maximum legal PGA gain in dB.
double	pga_db_per_step () const
	Return hardware step size of PGA (linear in dB).
bool	_write_oe (int which_dboard, int value, int mask)
	Write direction register (output enables) for pins that go to daughterboard.
bool	write_io (int which_dboard, int value, int mask)
	Write daughterboard i/o pin value.
bool	read_io (int which_dboard, int *value)
	Read daughterboard i/o pin value.
int	read_io (int which_dboard)
	Read daughterboard i/o pin value.
bool	write_aux_dac (int which_board, int which_dac, int value)
	Write auxiliary digital to analog converter.
bool	read_aux_adc (int which_dboard, int which_adc, int *value)
	Read auxiliary analog to digital converter.
int	read_aux_adc (int which_dboard, int which_adc)
	Read auxiliary analog to digital converter.
int	block_size () const
	returns current fusb block size
bool	set_dc_offset_cl_enable (int bits, int mask)
	Enable/disable automatic DC offset removal control loop in FPGA.
bool	start ()
	Start data transfers. Called in base class to derived class order.
bool	stop ()
	Stop data transfers. Called in base class to derived class order.
Static Public Member Functions
static usrp_basic_rx *	make (int which_board, int fusb_block_size=0, int fusb_nblocks=0, const std::string fpga_filename="", const std::string firmware_filename="")
	invokes constructor, returns instance or 0 if trouble
Protected Member Functions
	usrp_basic_rx (int which_board, int fusb_block_size=0, int fusb_nblocks=0, const std::string fpga_filename="", const std::string firmware_filename="")
bool	set_rx_enable (bool on)
bool	rx_enable () const
bool	disable_rx ()
void	restore_rx (bool on)
void	probe_rx_slots (bool verbose)
int	dboard_to_slot (int dboard)
Protected Attributes
int	d_dbid [2]